1. Field of the Invention
The present invention relates to a semiconductor memory device and a method of fabricating the same, more particularly, to an integrated semiconductor memory device and a method of fabricating the same.
2. Description of the Related Art
Fabricating semiconductor memory devices entails repetitively forming specific pattern on a wafer to produce an integrated circuit. Then, the wafer may be cut into unit chips, which may be packaged. In this case, before the wafer is cut into unit chips, the wafer undergoes an Electrical Die Sorting (EDS) process to examine the electrical characteristics of the unit chips. The EDS process examines the electrical characteristics of each cell to determine whether each cell is defective. In this case, if a cell is defective, the cell may be replaced by a previously manufactured redundancy cell. As a result, the defect rate may decrease, and the subsequent yield of semiconductor memory devices increases.
The repair process may be performed by irradiating a laser beam on wiring lines connected to defective cells to break the lines, or by allowing an over-current to flow to break the lines. In this case, the wiring line that may be broken by a laser beam or the over-current is referred to as a fuse.
As the technology advances, the integration density of semiconductor memory devices has increased, and fuses using over-current rather than a laser beam have become popular. An electrical fuse that may be broken by over current may be formed in a fuse region next to a region where a redundancy cell is formed. The fuse region is a region where electrical fuses are densely formed. However, as the semiconductor memory devices become more highly integrated, it may be necessary to decrease the area of the fuse region.